Tasks and Functions

Tasks and Functions

Tasks and functions provide the ability to execute common procedures from several different places in a description. They also provide a means of breaking up large procedures into smaller ones to make it easier to read and debug the source descriptions. Input, output, and inout argument values can be passed into and out of both tasks and functions.

Distinctions Between Tasks and Functions

The following rules distinguish tasks from functions:

• A function must execute in one simulation time unit; a task can contain time-controlling statements.

• A function cannot enable a task; a task can enable other tasks and functions.

• A function must have at least one input argument; a task can have zero or more arguments of any type.

• A function returns a single value; a task does not return a value. The purpose of a function is to respond to an input value by returning a single value. A task can support multiple goals and can calculate multiple result values. However, only the output or inout argumentspass result values back from the invocation of a task. A Verilog model uses a function as an operand in an expression; the value of that operand is the value returned by the function.

Syntax

· A task begins with keyword task and ends with keyword endtask

· Inputs and outputs are declared after the keyword task.

· Local variables are declared after input and output declaration.

Task and function declarations specify the following:

· local variables

· I/O ports

· registers

· times

· integers

· real

· events

These declarations all have the same syntax as for the corresponding declarations in a module definition. If there is more than one output, input, and inout port declared in a task these must be enclosed within a block.

Example

module simple_task();

task convert;

input [7:0] temp_in;

output [7:0] temp_out;

begin

temp_out = (9/5) *( temp_in + 32)

end

endtask

endmodule

Function

A Verilog HDL function is the same as a task, with very little differences, like function cannot drive more than one output, can not contain delays.

· functions are defined in the module in which they are used. It is possible to define functions in separate files and use compile directive 'include to include the function in the file which instantiates the task.

· functions can not include timing delays, like posedge, negedge, # delay, which means that functions should be executed in "zero" time delay.

· functions can have any number of inputs but only one output.

· The variables declared within the function are local to that function. The order of declaration within the function defines how the variables passed to the function by the caller are used.

· functions can take, drive, and source global variables, when no local variables are used. When local variables are used, basically output is assigned only at the end of function execution.

· functions can be used for modeling combinational logic.

· functions can call other functions, but can not call tasks.

Syntax

· A function begins with keyword function and ends with keyword endfunction

· inputs are declared after the keyword function.

Function Rules

Functions are more limited than tasks. The following five rules govern their usage:

• A function definition cannot contain any time controlled statements—that is, any statements introduced with #, @, or wait.

• Functions cannot enable tasks.

• A function definition must contain at least one input argument.

• A function definition must include an assignment of the function result value to the internal variable that has the same name as the function.

• A function definition can’t contain an inout declaration or an output declaration

Example

module simple_function();

function myfunction;

input a, b, c, d;

begin

myfunction = ((a+b) + (c-d));

end

endfunction

endmodule