Digital System Design Process

Digital System-Design Flow

The typical design flow is shown in figure 1,

Design Specification

· Specifications are written first-Requirement/needs about the project

· Describe the functionality overall architecture of the digital circuit to be designed.

· Specification: Word processor like Word, Kwriter, AbiWord and for drawing waveform use tools like wave former or test bencher or Word.

RTL Description

· Conversation of Specification in coding format using CAD Tools.

Coding Styles:

• Structural Modeling

• Data Flow Modeling

• Behavioral Modeling

• RTL Coding Editor : Vim, Emacs, conTEXT, HDL TurboWriter

Figure 1 VLSI Design Flow

Figure 2 Black Box View of 4:1 MUX

Functional Verification &Testing

· Comparing the coding with the specifications.

· Testing the Process of coding with corresponding inputs and outputs.

· If testing fails – once again check the RTL Description.

· Simulation: Modelsim, VCS, Verilog-XL,Nc-Verilog/VHDL

Figure 3 Simulation Output View of 4:1 MUX Using Modelsim Wave form Viewer

Logic Synthesis

· Conversation of RTL description into Gate level -Net list form.

· Description of the circuit in terms of gates and connections.

Synthesis: Design Compiler, FPGA Compiler, Synplify Pro, Leonardo Spectrum, Altera and Xilinx

Figure 4 Synthesis of 4:1 MUX Using Leonardo Spectrum Logical Verification and Testing

· Functional Checking of HDL coding by simulation and synthesis. If fails –check the RTL description.

Floor Planning Automatic Place and Route

· Creation of Layout with the corresponding gate level Net list.

· Arrange the blocks of the net list on the chip

· Place & Route: For FPGA use FPGA' vendors P&R tool. ASIC tools require expensive P&R tools like Apollo. Students can use LASI, Magic

Physical Layout

· Physical design is the process of transforming a circuit description into the physical layout, which describes the position of cells and routes for the interconnections between them.

Layout Verification

· Verifying the physical layout structure.

· If any modification –once again check Floor Planning Automatic Place and Route and RTL Description.

Implementation

· Final stage in the design process.

· Implementation of coding and RTL in the form of IC.

Figure 5 Layout view of a system