System Tasks and Functions

SYSTEM TASKS AND FUNCTIONS

Verilog contains the pre-defined system tasks and functions, including tasks for creating output from a simulation. All system tasks appear in the form $.Operations such as displaying the screen, monitoring values of nets, stopping and finishing are done by system tasks.

DISPLAY TASKS

$display

$display displays information to standard output and adds a newline character to the end of its output.

\ -The next character is a literal or non-printable character.

% -The next character specifies the display format for a subsequent expression parameter. A expression parameter (following the string) must be supplied for each % character that appears in a string.

%% -Displays the % character.

Special Characters:

\n	Newline character
\t	Tab character
\\	The \ character
\”	The " character (Double quote)
\o	A character specified in one to three octal digits

A null parameter (produces a single space character in the display.

Note: The $display task executes immediately when encountered in a behavior, and not necessarily after all simulation activity is complete. The $strobe tasks executes after all simulation activity is complete.

Note: if the host operating system buffers the text generated by $write instead of flushing it directly to the output, it is necessary to include an explicit newline character (\n) in the $write task to immediately send the text to the output. Otherwise, use the $display system task.

Format Specifications:

The escape sequences shown below specify the display format for a subsequent expression in a string parameter. Except for %m, a % character requires that a corresponding expression follow the string in the parameter list. The value of the expression replaces the format specification when the string is displayed. The decimal format is the default format.

%h or %H	Display in hexadecimal format
%d or %D	Display in decimal format
%o or %O	Display in octal format
%b or %B	Display in binary format
%c or %C	Display in ASCII character format
%v or %V	Display net signal value and strength
%m or %M	Display hierarchical name
%s or %S	Display as a string
%t or %T	Display in current time format
%f or %F	Display ‘real’ value in decimal format
%g or %G	Display ‘real’ value in exponential or decimal format, using the format that has the shorter printed output.

$monitor

$monitor continuously monitors and displays the values of any variables or expressions specified as parameters to the task. Parameters are specified in the same format as for $display. When a variable or expression changes, the simulator automatically displays the entire argument list at the end of the time step. If two or more variables change simultaneously, only one output is generated. Only one $monitor task display list may be active at a time, but new $monitor tasks can be invoked any number of times during a simulation.

Syntax:

$monitoron -$monitoron controls a flag to re-enable a previously disabled $monitor. A re-enabled $monitor immediately prints a display, regardless of whether a value change has taken place.

Syntax: $monitoron;

$monitoroff-$monitoroff controls a flag to disable monitoring.

Syntax: $monitoroff;

$write

$write displays information to standard output without adding a newline character to the end of its output.

Syntax: $write (list_of_arguments);

The default format of an expression argument that has no format specification is decimal. The companion $writeb, $writeo, and $writeh tasks specify binary, octal and hex default formats, respectively.

FILE I/O TASKS

$fclose

$fclose closes the channels specified in the MCD and prevents further writing to the closed channels.

Syntax: file_closed_task ::= $fclose (MCD);

$fdisplay-$fdisplay is the counterpart of $display; it is used to direct simulation data to a file.

Syntax: $fdisplay ([multi_channel_descriptor], list_of_arguments);

$fopen

$fopen opens the file specified by a parameter and returns a 32-bit unsigned MCD (integer multi-channel-descriptor) uniquely associated the file. $fopen rturns 0 if the file could not be opened. (See $fclose).

Syntax: file_open_function ::= integer multi_channel_descriptor = $fopen

(“[name_of_file]”);

$readmemb

$readmemb reads binary numbers from a text file and loads them into a Verilog memory, or sub-blocks of a memory, specified by an identifier.

Syntax: $readmemb (“filename”, memory_name [, start_addr [, finish_addr]]);

In this syntax memory_name is the identifier of the memory that will be loaded with data from the file specified by filename, and start_addr us the address at which the first number is to be written. The default is the left-hand address given in the declaration of the memory. The numbers read from the file are assigned to successive locations in memory. Loading of numbers continues to finish_addr or until the memory is full. The file may contain addresses, which are denoted by the @ symbol followed by the number.

When an address is encountered, the subsequent data is load into the memory beginning at the address. The text file may contain only whitespace, comments (either type), and binary numbers (also see $readmemh). The length and base of the numbers may not be specified.

$readmemh-$readmemh reads hexadecimal numbers from a text file and loads then into a Verilog memory, or sub-blocks of a memory, specified by an identifier.

Syntax: $readmemh (“filename”, memname[, start_addr [, finish_addr]]););

Example:

…

parameter ram_file_1 = “ram_data_file”;

reg [15: 0] RAM_1 [0:'hff];

initial $readmemh (ram_file_1, RAM_1);

In this syntax memory_name is the identifier of the memory that will be loaded with data from the file specified by filename,and start_addr us the address at which the first number is to be written. The default is the left-hand address given in the declaration of the memory. The numbers read from the file are assigned to successive locations in memory. Loading of numbers continues to finish_addr or until the memory is full. The file may contain addresses, which are denoted by the @ symbol followed by the number. When an address is encountered, the subsequent data is load into the memory beginning at the address. The text file may contain only whitespace, comments (either type), and hexadecimal numbers (also see $readmemb). The length and base of the numbers may not be specified.

SIMULATION CONTROL TASKS

$finish

$finish terminates simulation, and returns control to the host operating system.

Syntax: $finish;

$stop

$stop suspends simulation, issues an interactive prompt, and passes control to the user.

$stop(n) suspends simulation, issues and interactive prompt, and takes the following action, depending on the diagnostic control parameter, n:

n = 0 Prints nothing.

n = 1 Prints the simulation time and location

n = 2 Prints simulation time and location